Aldec improves its HES Proto-AXI software to provide greater support hardware verification and software validation.
Aldec enhances verification and validation tool
Programmable Logic and Asic
sureCore launches low power design service
A new Low Power Design Service that offers its concept-to-tape-out low power mixed-signal design expertise to ASIC developers
Zynq FPGA module has 38Gbyte/s memory bandwidth
Enclustra's Mercury+ XU9 module, is built around the Zynq UltraScale+ devices
Programmable mixed signal mop-up chip for automotive
Dialog has automotive-qualified one of its GreenPak family of one-time-programmable chips with multiple analogue and digital functions – intending it to replace multiple devices in navigation, infotainment and driver assistance systems, as well as display clusters and body electronics. Called SLG46620-A, it comes in a 6.4 x 6.5mm TSSOP-20 and is AEC-Q100 Grade 2. “In today’s automotive market, manufacturers are required to ...
ADC-FPGA-DAC board processes 12bits at 5.4Gsample/s
Teledyne e2v and Logic-X have developed an FPGA mezzanine card incorporating GHz ADCs and DACs from Telydyne. The 12bit EV12DS460A DAC provides an analogue bandwidth extending beyond 7GHz “facilitating multi-band, direct digital synthesis up to 26.5GHz K-band with a latency of three clock cycles”, according to Logic-X. The 12bit EV12AS350B ADC combines 5.4Gsample/s, an input bandwidth over 4.8GHz, latency as ...
Xilinx ships Versal Adaptive Compute Accelerator Platform ahead of schedule
Announced at the end of last year, the Versal AI Core and Versal Prime Adaptive Compute Acceleration Platform (ACAP) series are being shipped earlier than originally planned by Xilinx. The 7nm process ACAP is an integrated, multicore, heterogeneous compute platform that can dynamically adapt to meet workload demands in data centre, automotive, 5G wireless, wired and defence markets. Developed in ...
Cadence machine can prototype a 1bn gate SoC on FPGAs
For software development without final silicon, Cadence has launched FPGA-based hardware that can simulate SoCs with up to a billion gates. Called Protium X1, it is intended for debugging software intended to run on SoCs that have yet to be fabbed – for AI, 5G mobile and graphics processors, for example. It can run a 1bn gate design at around 5MHz, ...
Lattice puts high-grade security into small FPGAs to boot larger systems securely
Lattice is focusing on system security with small FPGAs that have their own root-of-trust alongside other security features that can protect processors, GPUs, other FPGAs, and their associated memories. “This is the first small FPGA designed to be compliant to SP 800-193 – as a chip, and enabling our customers to build compliant products,” said Lattice director of marketing Gordon Hands, ...
Xilinx produces HDMI 2.1 IP core
Xilinx has introduced an HDMI 2.1 IP subsystem to its portfolio of cores, enabling Xilinx devices to transmit, receive and process up to 8K (7680 x 4320 pixels) ultra-high-definition (UHD) video in pro AV equipment. That includes cameras, streaming media players, professional monitors, LED walls, projectors and KVM, as well as broadcast products such as end points and infrastructure that ...
China telco licenses eFPGA
Flex Logix has announced that MorningCore Technology is licensing EFLX4K eFPGA for TSMC’s 12nm FinFET Compact technology
