The latest Electronics Weekly product news involving software, such as Linux, MathWorks and PCB designers.
Analog Devices has teamed up with Antmicro to train two of ADI’s Cortex-M4 microcontollers to implement AI-at-the-edge. The key is Antmicro’s Visual Studio Code plug-in, which is built on its Kenning machine learning library. “Kenning’s aim is not to bring yet another training or compilation framework for deep learning models,” according to Antmicro. Kenning instead provides “a unified API that ...
A new working group has been announced to establish cross-industry collaboration to improve the interoperability of product and environment simulation, models, and components using existing and new open standards. Accellera Systems Initiative announced the Federated Simulation Standard (FSS) working group (WG). The charter of the new working group is chaired by NXP’s Martin Barnasconi,with Qualcomm’s Mark Burton as vice chair. ...
How does the (US) Chips Act affect innovation? This question was posed at DAC and the expert panel agreed that there is no lack of engineering talent but how to corral it to the right areas is proving more complex. Saverio Fazzari, senior lead engineer at management consultancy Booz Allen Hamilton. Workforce development, expressed his hopes for the cash injections. ...
SiTime is aiming for 24 hour timing hold-over in data centres and 5G infrastructure with temporal synchronising software called TimeFabric. “TimeFabric, combined with SiTime’s oscillators and clocks, delivers up to 9x more accurate time synchronization than quartz-based solutions,” claimed the company. Dipping into this a little deeper, SiTime is claiming that a quartz-based OCXO with IEEE 1588 software will glitch ...
Keysight has combined it Electromagnetic Simulator with Synopsys’ AI-powered RF design migration flow for an integrated design flow to migrate from TSMC’s N6RF+ to N4P process technology. The migration workflow builds on the foundry’s Analog Design Migration (ADM) methodology to streamline the redesign of passive devices and design components to the advanced RF process rules. The collaborative migration workflow leverages ...
For physical AI at the edge, MIPS has introduced the Atlas Explorer portfolio. The company explained that it allows designers cycle-accurate repeatability of their workload onto a MIPS processor. It provides access to platform IP ahead of silicon availability for evaluation to enable pre-production RTL and for teams to develop optimised hardware and concepts such as digital twins to gain ...
DAC 2025: There was a lot of talk about AI at this year’s DAC but one of the most significant was that Siemens Digital Industries Software has added generative and agentic AI capabilities across its EDA portfolio. The EDA AI system applies across all semiconductor and PCB design suites, including Questra, Tessent, Xpedition, Veloce, Catapult, Calibre, Aprisa and Solido. “It ...
Designers looking to optimise PPA (power, performance, area) are finding that optimisation engines can render original programmatic timing constraints unusable in their original form. At DAC 2025, Ausdia introduced Timevision OneSource which automatically generates a new version of block-level constraints after optimisation engines have worked on hierarchies, duplicate elements and performed advanced transformation. Such optimisations can save two weeks of ...
San Francisco: At last year’s DAC, Baya Systems emerged from stealth mode. At this year’s event, the design software company announced a switch fabric technology that is claimed to enable a x100 increase in node density. NeuraScale is designed to overcome critical scaling and data movement challenges in AI infrastructure that are driving advanced SoCs and emerging 3D chiplet-based designs, ...
Two software tools, Innovator3D IC and Calibre 3DStress, address chiplet integration and thermal management at the transistor level. Siemens Digital Industries Software announced the duo at DAC 2025. The Innovator3D IC suite advances 3D IC integration using AI to execute chip design and raise productivity, as designers increasingly reintegrate chiplets into high performance substrates, said the company. It enables IC ...
