AI processor chip powering next-generation smart systems Image credit: Anggalih Prasetya/Shutterstock.com
Power management integrated circuits (PMICs) use machine learning (ML) to predict load patterns and adjust voltage in real time to transform how devices manage energy.
These systems extend battery life and address challenges such as compact integration, overheating and battery ageing. Edge-trained controllers and efficient ML cores are driving the next generation of energy-aware electronics.
A PMIC supplies one/more voltages to other circuit blocks, converting energy either linearly or through switched-mode methods. Its goal is to maximise energy efficiency despite varying I/O voltages and dynamic load currents (from µA to several A). Power conversion efficiency, defined as the ratio of output to input power, is a critical performance metric. PMICs include features such as battery chargers, voltage regulators and power management control algorithms, along with protection against overheating, overcurrent and system failures.
PMICs manage power delivery and consumption, and drive switches for actuators and motors. They can be standalone or integrated into complex ICs. With AI and ML advances, intelligent power management is gaining importance for complex processors and sensors, and contributes to sustainability by lowering energy use and emissions.
In automotive applications these smart power ICs have in-built monitoring and control functions. The trend towards higher integration reduces size, weight and cost,
and improves efficiency and reliability. Space and weight constraints are critical in portable and automotive devices. High efficiency reduces heat and cooling needs, while low noise and reliability are essential due to the switching nature.
AI in PMICs
Designers face challenges such as managing four to 25 or more power rails, shrinking PCB space, complex power sequencing, evolving SoC specs, and tight time-to-market demands. Traditional methods are failing to solve them, prompting a shift towards programmable PMICs that offer scalable, efficient solutions through hardware and advanced tool chains.
Consumers worry about overheating and battery degradation in electronic devices, which reduce battery performance and lifespan. AI-powered PMICs enable adaptive and predictive power management. Through usage pattern analysis they can adjust energy delivery in real time, extending battery life in smartphones and wearables.
AI-powered power management integrates intelligent design and on-chip control. Tools such as AnDAPT’s PMIC.AI use AI to optimise power architecture and component selection, while Alif Semiconductor’s aiPM (autonomous intelligent power management) dynamically manages chip power based on AI workloads, enabling energy-efficient, adaptive voltage scaling and extending battery life in modern devices.
Challenges of integrating AI
The integration of AI into ICs can introduce critical challenges. An example is data security. AI processes vast amounts of sensitive information, making ICs vulnerable to model theft and adversarial attacks. Mitigating these risks requires strict access controls, robust encryption and continuous monitoring
Another hurdle is the lack of AI technology standardisation within the IC domain, hampering interoperability and extensive adoption. Experts emphasise the need for unified design processes and evaluation standards to ensure compatibility across components.
Despite these challenges, innovations mark a significant leap toward more sustainable, compact and high-performance devices. Continued development in AI integration and secure design practices will be key to unlocking their full potential.
Did you know?
AnDAPT’s PMIC.AI is an AI-powered power design assistant designed to alter how engineers create power architectures. It is based on OpenAI’s O1 large language model and enhanced with retrieval augmented generation (RAG). It analyses input voltages, rail specs and sequencing needs to generate optimal solutions when given SoC power requirements.
Power management IC (PMIC) chip on a circuit board Image credit: luchschenF/Shutterstock.com
Key features include automated power tree analysis, streamlining power architecture design; intelligent rail sequencing, optimising power-down, power-up, and rail combination sequencing; advanced compensator selection increases stability using AI-driven tuning; neural network-based part recommendations, providing optimised part suggestions; and single-click design visualisation, refining and generating power designs.
It generates an efficiency-optimised design with intelligent topology selection and outputs key parameters such as switching frequency and compensator co-efficients. Users can then view the detailed chip architecture and download programming files.
RAG retrieves real-time, authoritative and proprietary data from sources such as power design databases and component specifications. This data is contextually integrated with the company’s AmP chip architecture and knowledge base. The AI generates component recommendations, power tree designs and design strategies. Fine-tuning adapts a pre-trained model specifically to power management tasks using a domain-aligned model selection, preparing a relevant dataset, modifying model architecture, retraining with the new data and performance evaluation.
The company’s proprietary database is integrated with ML to predict design challenges, recommend efficient power conversion strategies and optimise thermal performance.
Autonomous intelligent power management (aiPM) is designed to achieve low power consumption in embedded systems. It uses dynamic frequency scaling, powering down unused chip regions, clock gating and entering deep sleep modes to adjust power usage based on the application’s immediate requirements. The system supports run, ready, idle, standby and stop power modes, allowing workload condition-based precise control over power consumption.
On-chip integration eliminates the need for traditional external sources and internally performs all power management functions. For instance, in STOP mode – where the real-time clock remains operational, the device consumes less than 1.6μA at 3.3V. In run mode the device uses just 27μA/MHz, while executing code from SRAM using the Cortex-M55 CPU. In multi-core systems, components such as the MCU and Ethos-U55 NPU can stay active for low-power sensing tasks such as motion, vibration, audio or video. Other components, such as the Cortex-A32 MPU, graphics processors, or universal serial bus interfaces, are powered on only when required, thus giving complex, multi-core systems the ability to behave like small, purpose-built, low-power MCUs when needed.
