“Bluespec’s RISC-V processors now integrate into the Achronix 2D network-on-chip architecture, simplifying integration and enabling engineers to add scalable processing to their designs,” according to Achronix. “The network allows multiple instances of the RISC-V core to be added, and relocated to different areas of the FPGA fabric while maintaining performance.”
Developers, it went on to say, can therefore run C/C++ applications on bare metal or operating systems on hardware subsystems, with one to eight 64bit processors individually configured with floating point instructions, custom instructions and hardware accelerators.
Two integer RISC-V architectures are available: RV32I or RV64I, with pipelines up to five stages. To these can be added extensions for multiplication, atomic operations, compressed code, single-precision floating point or double-precision floating point. Modes include privilege level user, supervisor and machine.
Maximum operating frequency is 225MHz, and 1.72 Coremark/MHz is claimed by Bluespec.
“The high bandwidth provided by the network-on-chip allows the RISC-V cores to quickly access large datasets from memory interfaces or external I/O, crucial for data-intensive applications such as machine learning inference, high-speed packet processing, and real-time analytics,” said Bluespec.
