
There are three challenges, each dealing with a critical aspect of simulation and reliability in electronic packaging. The first is for BSc and MSc students: to define a low-cost robust thermal solution for a high power AI/datacentre processor.
PHd students are also to identify gaps and propose innovative concepts in materials, interfaces, and processing that could enable ultra-scalable interconnects in future semiconductor packaging. A second challenge for this group is: Electromigration solutions for BGA interconnects in AI-focused packages.
“The finalist student teams gain exposure to the conference’s . . . technical program and packaging experts; networking with potential employers, including potential internships,” said Przemyslaw Gromala, ECTC 2026 vice general chair and senior expert & simulation team leader at Robert Bosch. There is also the opportunity to have their work published in IEEE Transactions on Components, Packaging and Manufacturing Technology magazine.
Students must register their interest by 31 December 2025. Reports with results and findings must be submitted by 19 January 2026. The organising committee will announced the six finalists on 16 February and the teams will have until 15 May 2026 to finalise their work and submit their presentations.
Winning teams will have the opportunity to attend ECTC 2026 with financial assistance, including travel costs up to a specified amount.
ECTC 2026 will take place at JW Marriott & Ritz-Carlton Grande Lakes Resort Orlando, Florida, USA from 26-29 May 2026.
Electronics Weekly