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EDA and IP

AI drives graphical MCU configurator selector

MCU configurator tool

At Microelectronics UK, Embedd.it unveiled its cross-vendor graphical MCU configurator. The company said that it will “remove hardware dependencies in embedded software” and strengthen supply chain resilience. The configurator uses AI to retrieve and organise data on more than 1,400 MCU families from major manufacturers, including Renesas, STMicroelectronics, NXP Semiconductors and Texas Instruments. The configurator is part of a suite ...

Open-source Linux OS for prototyping to production

Periodio Avocado OS

A scalable Linux tool launched by Peridio is an open-source OS designed to migrate designs from protoype to production. Justin Schneck, co-founder and chief product officer of Peridio, explained that embedded developers’ either have to choose a packaged Linux distribution which can work immediately but which is difficult to scale and secure in volume production, or build their own security-hardened, ...

64Gbit/s die-to-die interconnect

Marvell Technology is claiming a first with its 2nm 64Gbit/s bi-directional die-to-die interconnect for xPUs. “Delivering 32Gbit/s of simultaneous two-way connectivity over a single wire, the interface offers bandwidth density over 30Tbit/s/mm, more than three times the bandwidth density of UCIe at equivalent speeds,” it said. Adaptive power management automatically adjusts for bursty traffic, reducing “interface power consumption by up ...

Astroscale wins patent for repeated active debris removal

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Astroscale – a specialist in satellite servicing and space debris removal – has won a patent for its distributed architecture approach to repeated active debris removal (ADR). Specifically it is the U.S. Patent No. 12,234,043 B2, “Method and System for Multi-Object Space Debris Removal”. Under the patented method, the servicer docks with a debris object (the “client”) and transfers it ...

Ansys releases R2 tool suite with AI capabilities

Ansys 2025 R2 copilot feature

Ansys has released its latest toolsuite, 2025 R2, which has many products with AI+, together with a virtual AI assistant and enhanced data management and workflow automation. The 2025 R2 suite includes the Engineering Copilot (pictured) in existing products (AnsysGPT, powered by Azure OpenAI, Ansys Mechanical, Discovery, Fluent, HFSS, Electronics Desktop (AEDT), Scade One, Speos, Maxwell, optiSLang and Lumerical). In ...

Synopsys finalises Ansys acquisition

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Synopsys has completed the acquisition of Ansys. The $35bn deal brings Ansys’ predictive simulation and analysis tools into the Synopsys family for design tools using AI. “The increasing complexity of developing intelligent systems demands design solutions with a deeper integration of electronics and physics, enhanced by AI,” said Sassine Ghazi, president and CEO of Synopsys (pictured). “Today marks a transformational ...

The chiplet future could be harmonious

Abhijeet Chakraborty VP Engineering Synopsys

There is a general consensus and belief that chiplets are the future, said Abhijeet Chakraborty, VP engineering, Synopsys. There are, however, no illusions about some of the challenges or obstacles that have to be addressed, he added. The first of these is interoperability and standards. Access to chiplets is essential to design any complex, large system, Chakraborty told Electronics Weekly ...

Arm licenses Siemens Veloce verification software for Neoverse

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Arm has licensed Siemens Digital Industries’ Veloce verification software for its Neoverse Compute Subsystems, The Veloce system is available in a modular, blade-based configuration that complies with datacentre requirements for installation, power consumption, cooling and footprint. Veloce proFPGA is also offered as a desktop lab version. Veloce Strato delivers emulation, maintains full visibility debug, and scales from 40 million gates ...

Working group to tackle interoperability for system-of-systems simulation

Accellera chair Lu Dai

A new working group has been announced to establish cross-industry collaboration to improve the interoperability of product and environment simulation, models, and components using existing and new open standards. Accellera Systems Initiative announced the Federated Simulation Standard (FSS) working group (WG). The charter of the new working group is chaired by NXP’s Martin Barnasconi,with Qualcomm’s Mark Burton as vice chair. ...

DVCon Europe announces keynote lineup

DVCon 2025 Amanda Brock

The Design and Verification Conference & Exhibition Europe (DVCon Europe) has announced its keynote speakers. Ralph Schleifer, head of virtual ECUs and simulation at CARIAD will deliver ‘Driving Forward: The Evolution of Virtual Development in the Automotive Industry’,  and Amanda Brock (pictured), CEO of OpenUK’s keynote is entitled:  ‘We didn’t start the fire…open source software in 2025’. Mark Burton, general ...